DEC 4000 AXP

Two models of CPU module were used in the DEC 4000 AXP, the KN430 (also known as the B2001-BA), used in the Model 600 Series, and the B2012-AA, used in the Model 700 Series. The KN430 contains a 160 MHz DECchip 21064 microprocessor with 1 MB of B-cache (L2 cache), whereas the B2012-AA contains a 190 MHz DECchip 21064 with 4 MB of B-cache. Two C³ (Command, Control and Communication) ASICs on the CPU module provide a number of functions, such as implementing the B-cache controller and the bus interface unit (BIU), which interfaces the microprocessor to the 128-bit address and data multiplexed system bus to enable communication between the CPU, memory and I/O modules. These ASICs were fabricated in a 0.8 micrometre process.

The MS430 memory module has capacities of 32, 64, 128, 256 and 512 MB of memory. The memory is organised into four banks, each 280 bits wide, of which 256 bits are used to store data and 24 bits are used to store error detection and correction (EDC) information. The memory is protected by EDC logic, which is capable of detecting and correcting 1-bit errors and common 2-, 3- and 4-bit errors.

The memory is implemented using 280 surface mounted dual in-line package (DIP) 4-bit dynamic random access memory (DRAM) chips with capacities of 1, 4 and 16 Mb that reside on both sides of the module.

Located on the module are two CMIC ASICs which control the memory and interface the module to the system bus. Each CMIC ASIC is responsible for managing half of the 280-bit memory bus and the 128-bit system bus. The CMIC ASICs are fabricated in a CMOS process and are packaged in a 299-position pin grid array (PGA) package.

The memory module is the same size as the CPU module and connects to the backplane via two 129-pin and four 24-pin connectors.

The DEC 4000 AXP uses the KFA40 I/O module, which contains the entire I/O subsystem. The I/O module is the largest module in the system, and two variants existed. The first variant offered four SCSI-2 buses and two Ethernet ports and the second variant offered four DSSI/SCSI buses and one Ethernet port. The second variant however only has half the bandwidth of the SCSI-2 buses of the first variant, although the advanced features of DSSI justified its use in some cases. Aside from these differences, the rest of the I/O module was essentially the same.

I/O module features common to both variants are an additional SCSI-2 bus for removable media drives only, a Zilog 85C30 Serial Communications Controller (UART) that provides two serial lines, a Dallas Semiconductor DS1287 real-time clock, and most of the firmware in the DEC 4000 AXP. For controlling the Futurebus+ and to interface the I/O module to the system bus, two IONIC ASICs are used. The Ethernet functionality in the I/O function is provided by the TGEC (Third Generation Ethernet Chip), also known as the DC253, while the SCSI/DSSI buses are provided by four NCR 53C710 SCSI/DSSI controllers and their associated DSSI drivers (second I/O module variant only).

Most of the I/O devices are connected to the local I/O bus, known as the "Lbus", a 32-bit address and data multiplexed bus.

The DEC 4000 AXP has four fixed media mass storage compartments, each capable of holding one 5¼ inch or four 3½ inch devices. A single removable media mass storage compartment held the CD-ROM drives and tape drives. In addition to internal storage, an external storage cabinet could be attached via an external SCSI port to provide more storage.

The DEC 4000 AXP systems used the Futurebus+ Profile B for expansion, with six slots. These slots provided a peak transfer rate of 160 MB/s.[2]

The BA640 cabinet has a width of 49.9 cm (20 in), a height of 88.3 cm (35 in) and a depth of 77.5 cm (31 in). It has a maximum weight of 124 kg (275 lb). The BA641 19-inch rackmountable enclosure has a width of 48.26 cm (19 in), a height of 44.4 cm (17.5 in) and a depth of 75.7 cm (29.8 in) with mounting brackets. It has a typical weight of 65.7 kg (146 lb).