< MIPS Assembly

This page describes the implementation details of the MIPS instruction formats.

R Instructions

R instructions are used when all the data values used by the instruction are located in registers.

All R-type instructions have the following format:

OP rd, rs, rt

Where "OP" is the mnemonic for the particular instruction. rs, and rt are the source registers, and rd is the destination register. As an example, the add mnemonic can be used as:

add $s1, $s2, $s3

Where the values in $s2 and $s3 are added together, and the result is stored in $s1. In the main narrative of this book, the operands will be denoted by these names.

R Format

Converting an R mnemonic into the equivalent binary machine code is performed in the following way:

opcodersrtrdshift (shamt)funct
6 bits5 bits5 bits5 bits5 bits6 bits
opcode
The opcode is the machinecode representation of the instruction mnemonic. Several related instructions can have the same opcode. The opcode field is 6 bits long (bit 26 to bit 31).
rs, rt, rd
The numeric representations of the source registers and the destination register. These numbers correspond to the $X representation of a register, such as $0 or $31. Each of these fields is 5 bits long. (25 to 21, 20 to 16, and 15 to 11, respectively). Interestingly, rather than rs and rt being named r1 and r2 (for source register 1 and 2), the registers were named "rs" and "rt" for register source, register target and register destination.
Shift (shamt)
Used with the shift and rotate instructions, this is the amount by which the source operand rs is rotated/shifted. This field is 5 bits long (6 to 10).
Funct
For instructions that share an opcode, the funct parameter contains the necessary control codes to differentiate the different instructions. 6 bits long (0 to 5). Example: Opcode 0x00 accesses the ALU, and the funct selects which ALU function to use.

Function Codes

Because several functions can have the same opcode, R-Type instructions need a function (Func) code to identify what exactly is being done - for example, 0x00 refers to an ALU operation and 0x20 refers to ADDing specifically.

Shift Values

I Instructions

I instructions are used when the instruction must operate on an immediate value and a register value. Immediate values may be a maximum of 16 bits long. Larger numbers may not be manipulated by immediate instructions.

I instructions are called in the following way:

OP rt, IMM(rs)

However, beq and bne instructions are called in the following way:

OP  rs, rt, IMM

Where rt is the target register, rs is the source register, and IMM is the immediate value. The immediate value can be up to 16 bits long. For instance, the addi instruction can be called as:

addi $s1, $s2, 100

Where the value of $s2 plus 100 is stored in $s1.

I Format

I instructions are converted into machine code words in the following format:

opcodersrtIMM
6 bits5 bits5 bits16 bits
Opcode
The 6-bit opcode of the instruction. In I instructions, all mnemonics have a one-to-one correspondence with the underlying opcodes. This is because there is no funct parameter to differentiate instructions with an identical opcode. 6 bits (26 to 31)
rs, rt
The source and target register operands, respectively. 5 bits each (21 to 25 and 16 to 20, respectively).[1]
IMM
The 16 bit immediate value. 16 bits (0 to 15). This value is usually used as the offset value in various instructions, and depending on the instruction, may be expressed in two's complement.

J Instructions

J instructions are used when a jump needs to be performed. The J instruction has the most space for an immediate value, because addresses are large numbers.

J instructions are called in the following way:

OP LABEL 

Where OP is the mnemonic for the particular jump instruction, and LABEL is the target address to jump to.

J Format

J instructions have the following machine-code format:

OpcodePseudo-Address
Opcode
The 6 bit opcode corresponding to the particular jump command. (26 to 31).
Address
A 26-bit shortened address of the destination. (0 to 25). The two least significant bits are removed, and the 4 most significant bits are removed, and assumed to be the same as the current instruction's address.

FR Instructions

FR instructions are similar to the R instructions described above, except they are reserved for use with floating-point numbers:

Opcodefmtftfsfdfunct

FI Instructions

FI instructions are similar to the I instructions described above, except they are reserved for use with floating-point numbers:

OpcodefmtftImm

Opcodes

The following table contains a listing of MIPS instructions and the corresponding opcodes. Opcode and funct numbers are all listed in hexadecimal.

Mnemonic Meaning Type Opcode Funct
addAddR0x000x20
addiAdd ImmediateI0x08NA
addiuAdd Unsigned ImmediateI0x09NA
adduAdd UnsignedR0x000x21
andBitwise ANDR0x000x24
andiBitwise AND ImmediateI0x0CNA
beqBranch if EqualI0x04NA
blezBranch if Less Than or Equal to ZeroI0x06NA
bneBranch if Not EqualI0x05NA
bgtzBranch on Greater Than ZeroI0x07NA
divDivideR0x000x1A
divuUnsigned DivideR0x000x1B
jJump to AddressJ0x02NA
jalJump and LinkJ0x03NA
jalrJump and Link RegisterJ0x000x09
jrJump to Address in RegisterR0x000x08
lbLoad ByteI0x20NA
lbuLoad Byte UnsignedI0x24NA
lhuLoad Halfword UnsignedI0x25NA
luiLoad Upper ImmediateI0x0FNA
lwLoad WordI0x23NA
mfhiMove from HI RegisterR0x000x10
mthiMove to HI RegisterR0x000x11
mfloMove from LO RegisterR0x000x12
mtloMove to LO RegisterR0x000x13
mfc0Move from Coprocessor 0R0x10NA
multMultiplyR0x000x18
multuUnsigned MultiplyR0x000x19
norBitwise NOR (NOT-OR)R0x000x27
xorBitwise XOR (Exclusive-OR)R0x000x26
orBitwise ORR0x000x25
oriBitwise OR ImmediateI0x0DNA
sbStore ByteI0x28NA
shStore HalfwordI0x29NA
sltSet to 1 if Less ThanR0x000x2A
sltiSet to 1 if Less Than ImmediateI0x0ANA
sltiuSet to 1 if Less Than Unsigned ImmediateI0x0BNA
sltuSet to 1 if Less Than UnsignedR0x000x2B
sllLogical Shift LeftR0x000x00
srlLogical Shift Right (0-extended)R0x000x02
sraArithmetic Shift Right (sign-extended)R0x000x03
subSubtractR0x000x22
subuUnsigned SubtractR0x000x23
swStore WordI0x2BNA
  1. Lin, Charles (2003-03-27). "Instruction Format". Archived from the original on 2018-01-01. https://web.archive.org/web/20180101004911if_/http://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Mips/format.html. Retrieved 2019-11-12.
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