Electromigration

Two forces affect ionized atoms in a conductor: 1) The direct electrostatic force F_e, as a result of the electric field ${\displaystyle E}$, which has the same direction as the electric field, and 2) The force from the exchange of momentum with other charge carriers F_p, toward the flow of charge carriers, is in the opposite direction of the electric field. In metallic conductors F_p is caused by a so-called "electron wind" or "ion wind".

The resulting force F_res on an activated ion in the electrical field can be written as

${\displaystyle F_{res}=F_{e}-F_{p}=q\cdot (Z_{e}-Z_{p})\cdot E=q\cdot Z^{*}\cdot E=q\cdot Z^{*}\cdot j\cdot \rho }$

where ${\displaystyle q}$ is the electric charge of the ions,${\displaystyle Z_{e}}$ and ${\displaystyle Z_{p}}$ the valences corresponding to the electrostatic and wind force respectively, ${\displaystyle Z^{*}}$ the so-called effective valence of the material, ${\displaystyle j}$ the current density, and ${\displaystyle \rho }$ the resistivity of the material .[7] Electromigration occurs when some of the momentum of a moving electron is transferred to a nearby activated ion. This causes the ion to move from its original position. Over time this force knocks a significant number of atoms far from their original positions. A break or gap can develop in the conducting material, preventing the flow of electricity. In narrow interconnect conductors, such as those linking transistors and other components in integrated circuits, this is known as a void or internal failure (open circuit). Electromigration can also cause the atoms of a conductor to pile up and drift toward other nearby conductors, creating an unintended electrical connection known as a hillock failure or whisker failure (short circuit). Both of these situations can lead to a malfunction of the circuit.

In a homogeneous crystalline structure, because of the uniform lattice structure of the metal ions, there is hardly any momentum transfer between the conduction electrons and the metal ions. However, this symmetry does not exist at the grain boundaries and material interfaces, and so here momentum is transferred much more vigorously. Since the metal ions in these regions are bonded more weakly than in a regular crystal lattice, once the electron wind has reached a certain strength, atoms become separated from the grain boundaries and are transported in the direction of the current. This direction is also influenced by the grain boundary itself, because atoms tend to move along grain boundaries.

Diffusion processes caused by electromigration can be divided into grain boundary diffusion, bulk diffusion and surface diffusion. In general, grain boundary diffusion is the major electromigration process in aluminum wires, whereas surface diffusion is dominant in copper interconnects.

In an ideal conductor, where atoms are arranged in a perfect lattice structure, the electrons moving through it would experience no collisions and electromigration would not occur. In real conductors, defects in the lattice structure and the random thermal vibration of the atoms about their positions causes electrons to collide with the atoms and scatter, which is the source of electrical resistance (at least in metals; see electrical conduction). Normally, the amount of momentum imparted by the relatively low-mass electrons is not enough to permanently displace the atoms. However, in high-power situations (such as with the increasing current draw and decreasing wire sizes in modern VLSI microprocessors), if many electrons bombard the atoms with enough force to become significant, this will accelerate the process of electromigration by causing the atoms of the conductor to vibrate further from their ideal lattice positions, increasing the amount of electron scattering. High current density increases the number of electrons scattering against the atoms of the conductor, and hence the rate at which those atoms are displaced.

In integrated circuits, electromigration does not occur in semiconductors directly, but in the metal interconnects deposited onto them (see semiconductor device fabrication).

Electromigration is exacerbated by high current densities and the Joule heating of the conductor (see electrical resistance), and can lead to eventual failure of electrical components. Localized increase of current density is known as current crowding.

A governing equation which describes the atom concentration evolution throughout some interconnect segment, is the conventional mass balance (continuity) equation

${\displaystyle {\frac {\partial N}{\partial t}}+\nabla \cdot {\vec {J}}=0}$

where ${\displaystyle N({\vec {x}},t)}$ is the atom concentration at the point with a coordinates ${\displaystyle {\vec {x}}=(x,y,z)}$ at the moment of time ${\displaystyle t}$, and ${\displaystyle J}$ is the total atomic flux at this location. The total atomic flux ${\displaystyle J}$ is a combination of the fluxes caused by the different atom migration forces. The major forces are induced by the electric current, and by the gradients of temperature, mechanical stress and concentration. ${\displaystyle {\vec {J}}={\vec {J}}_{c}+{\vec {J}}_{T}+{\vec {J}}_{\sigma }+{\vec {J}}_{N}}$.

To define the fluxes mentioned above:

${\displaystyle {\vec {J}}_{c}={\frac {NeZD\rho }{kT}}\,{\vec {j}}}$.

Here ${\displaystyle e}$ is the electron charge, ${\displaystyle eZ}$ is the effective charge of the migrating atom, ${\displaystyle \rho }$ the resistivity of the conductor where atom migration takes place, ${\displaystyle {\vec {j}}}$ is the local current density, ${\displaystyle k}$ is the Boltzmann constant, ${\displaystyle T}$ is the absolute temperature. ${\displaystyle D({\vec {x}},t)}$ is the time and position dependent atom diffusivity.

${\displaystyle {\vec {J}}_{T}=-{\frac {NDQ}{kT^{2}}}\nabla T}$.  We use ${\displaystyle Q}$ the heat of thermal diffusion.

${\displaystyle {\vec {J}}_{\sigma }={\frac {ND\Omega }{kT}}\nabla \!H}$,

here ${\displaystyle \Omega =1/N_{0}}$ is the atomic volume and ${\displaystyle N_{0}}$ is initial atomic concentration, ${\displaystyle H=(\sigma _{11}+\sigma _{22}+\sigma _{33})/3}$ is the hydrostatic stress and ${\displaystyle \sigma _{11},\sigma _{22},\sigma _{33}}$ are the components of principal stress.

${\displaystyle {\vec {J}}_{N}=-D\,\nabla \!N}$.

Assuming a vacancy mechanism for atom diffusion we can express ${\displaystyle D}$ as a function of the hydrostatic stress ${\displaystyle D=D_{0}\exp \left({\tfrac {\Omega H-E_{A}}{kT}}\right)}$ where ${\displaystyle E_{A}}$ is the effective activation energy of the thermal diffusion of metal atoms. The vacancy concentration represents availability of empty lattice sites, which might be occupied by a migrating atom.

At the end of the 1960s J. R. Black developed an empirical model to estimate the MTTF (mean time to failure) of a wire, taking electromigration into consideration. Since then, the formula has gained popularity in the semiconductor industry:[3][8]

${\displaystyle {\text{MTTF}}={\frac {A}{J^{n}}}\exp {\left({\frac {E_{\text{a}}}{kT}}\right)}}$.

Here ${\displaystyle A}$ is a constant based on the cross-sectional area of the interconnect, ${\displaystyle J}$ is the current density, ${\displaystyle E_{\text{a}}}$ is the activation energy (e.g. 0.7 eV for grain boundary diffusion in aluminum), ${\displaystyle k}$ is the Boltzmann constant, ${\displaystyle T}$ is the temperature in kelvins, and ${\displaystyle n}$ a scaling factor (usually set to 2 according to Black).[3] The temperature of the conductor appears in the exponent, i.e. it strongly affects the MTTF of the interconnect. For an interconnect of a given construction to remain reliable as the temperature rises, the current density within the conductor must be reduced. However, as interconnect technology advances at the nanometer scale, the validity of Black's equation becomes increasingly questionable.

Historically, aluminium has been used as conductor in integrated circuits, due to its good adherence to substrate, good conductivity, and ability to form ohmic contacts with silicon.[5] However, pure aluminium is susceptible to electromigration. Research shows that adding 2-4% of copper to aluminium increases resistance to electromigration about 50 times. The effect is attributed to the grain boundary segregation of copper, which greatly inhibits the diffusion of aluminium atoms across grain boundaries.[9]

Pure copper wires can withstand approximately five times more current density than aluminum wires while maintaining similar reliability requirements.[10] This is mainly due to the higher electromigration activation energy levels of copper, caused by its superior electrical and thermal conductivity as well as its higher melting point. Further improvements can be achieved by alloying copper with about 1% palladium which inhibits diffusion of copper atoms along grain boundaries in the same way as the addition of copper to aluminium interconnect.

A wider wire results in smaller current density and, hence, less likelihood of electromigration. Also, the metal grain size has influence; the smaller grains, the more grain boundaries and the higher likelihood of electromigration effects. However, if you reduce wire width to below the average grain size of the wire material, grain boundaries become "crosswise", more or less perpendicular to the length of the wire. The resulting structure resembles the joints in a stalk of bamboo. With such a structure, the resistance to electromigration increases, despite an increase in current density. This apparent contradiction is caused by the perpendicular position of the grain boundaries; the boundary diffusion factor is excluded, and material transport is correspondingly reduced.[10][11]

However, the maximum wire width possible for a bamboo structure is usually too narrow for signal lines of large-magnitude currents in analog circuits or for power supply lines. In these circumstances, slotted wires are often used, whereby rectangular holes are carved in the wires. Here, the widths of the individual metal structures in between the slots lie within the area of a bamboo structure, while the resulting total width of all the metal structures meets power requirements.[10][11]

There is a lower limit for the length of the interconnect that will allow higher current carrying capability. It is known as "Blech length".[2] Any wire that has a length below this limit will have a stretched limit for electromigration. Here, a mechanical stress buildup causes an atom back flow process which reduces or even compensates the effective material flow towards the anode. The Blech length must be considered when designing test structures to evaluate electromigration. This minimum length is typically some tens of microns for chip traces, and interconnections shorter than this are sometimes referred to as 'electromigration immortal'.

Particular attention must be paid to vias and contact holes. The current carrying capacity of a via is much less than a metallic wire of same length. Hence multiple vias are often used, whereby the geometry of the via array is very significant: multiple vias must be organized such that the resulting current is distributed as evenly as possible through all the vias.

Attention must also be paid to bends in interconnects. In particular, 90-degree corner bends must be avoided, since the current density in such bends is significantly higher than that in oblique angles (e.g., 135 degrees).[10]

The typical current density at which electromigration occurs in Cu or Al interconnects is 10⁶ to 10⁷ A/cm². For solder joints (SnPb or SnAgCu lead-free) used in IC chips, however, electromigration occurs at much lower current densities, e.g. 10⁴ A/cm². It causes a net atom transport along the direction of electron flow. The atoms accumulate at the anode, while voids are generated at the cathode and back stress is induced during electromigration. The typical failure of a solder joint due to electromigration will occur at the cathode side. Due to the current crowding effect, voids form first at the corners of the solder joint. Then the voids extend and join to cause a failure. Electromigration also influences formation of intermetallic compounds, as the migration rates are a function of atomic mass.

The complete mathematical model describing electromigration consists of several partial differential equations (PDEs) [12] which need to be solved for three-dimensional geometrical domains representing segments of an interconnect structure. Such a mathematical model forms the basis for simulation of electromigration in modern technology computer aided design (TCAD) tools.[13] Use of TCAD tools for detailed investigations of electromigration induced interconnect degradation is gaining importance. Results of TCAD studies in combination with reliability tests lead to modification of design rules improving the interconnect resistance to electromigration.[14]

The electromigration degradation of the on-chip power grid network/interconnect depends on the IR drop noise of the power grid interconnect. The electromigration-aware lifetime of the power grid interconnects as well as the chip decreases if the chip suffers from a high value of the IR drop noise.[15]

Recent work demonstrates MTTF prediction using a machine learning model. The work uses a neural network-based supervised learning approach with current density, interconnect length, interconnect temperature as input features to the model.[16][17]

• Christou, A (1993). Electromigration and Electronic Device Degradation. Wiley. ISBN 978-0-471-58489-6.
• Lienig, J., Thiele, M. (2018). Fundamentals of Electromigration-Aware Integrated Circuit Design. Springer. doi:10.1007/978-3-319-73558-0. ISBN 978-3-319-73557-3.{{cite book}}: CS1 maint: multiple names: authors list (link)