Dennard scaling

In semiconductor electronics, Dennard scaling, also known as MOSFET scaling, is a scaling law which states roughly that, as transistors get smaller, their power density stays constant, so that the power use stays in proportion with area; both voltage and current scale (downward) with length.[1][2] The law, originally formulated for MOSFETs, is based on a 1974 paper co-authored by Robert H. Dennard, after whom it is named.[3]

Derivation

Dennard's model of MOSFET scaling implies that, with every technology generation:

  1. Transistor dimensions could be scaled by −30% (0.7×). This has the following effects simultaneously:
  2. The above effects lead to an increase in operating frequency, f, by about 40% (1.4×), because frequency varies with one over delay.
  3. Power consumption of an individual transistor decreases by 50%, because active power is CV2f.[4]

Therefore, in every technology generation, the area and power consumption of individual transistors is halved. In other words, if the transistor density doubles, power consumption (with twice the number of transistors) stays the same.

Relation with Moore's law and computing performance

Moore's law says that the number of transistors doubles approximately every two years. Combined with Dennard scaling, this means that performance per joule grows even faster, doubling about every 18 months (1.5 years). This trend is sometimes referred to as Koomey's law. The rate of doubling was originally suggested by Koomey to be 1.57 years,[5] but more recent estimates suggest this is slowing.[6]

Breakdown of Dennard scaling around 2006
Further information: MOSFET § Scaling

The dynamic (switching) power consumption of CMOS circuits is proportional to frequency.[7] Historically, the transistor power reduction afforded by Dennard scaling allowed manufacturers to drastically raise clock frequencies from one generation to the next without significantly increasing overall circuit power consumption.

Since around 2005–2007 Dennard scaling appears to have broken down. As of 2016, transistor counts in integrated circuits are still growing, but the resulting improvements in performance are more gradual than the speed-ups resulting from significant frequency increases.[1][8] The primary reason cited for the breakdown is that at small sizes, current leakage poses greater challenges and also causes the chip to heat up, which creates a threat of thermal runaway and therefore further increases energy costs.[1][8]

The breakdown of Dennard scaling and resulting inability to increase clock frequencies significantly has caused most CPU manufacturers to focus on multicore processors as an alternative way to improve performance. An increased core count benefits many (though by no means all – see Amdahl's law) workloads, but the increase in active switching elements from having multiple cores still results in increased overall power consumption and thus worsens CPU power dissipation issues.[9][10] The end result is that only some fraction of an integrated circuit can actually be active at any given point in time without violating power constraints. The remaining (inactive) area is referred to as dark silicon.

References
  1. McMenamin, Adrian (April 15, 2013). "The end of Dennard scaling". Retrieved January 23, 2014.
  2. Streetman, Ben G.; Banerjee, Sanjay Kumar (2016). Solid state electronic devices. Boston: Pearson. p. 341. ISBN 978-1-292-06055-2. OCLC 908999844.
  3. Dennard, Robert H.; Gaensslen, Fritz; Yu, Hwa-Nien; Rideout, Leo; Bassous, Ernest; LeBlanc, Andre (October 1974). "Design of ion-implanted MOSFET's with very small physical dimensions". IEEE Journal of Solid-State Circuits. SC-9 (5): 256–268. Bibcode:1974IJSSC...9..256D. doi:10.1109/JSSC.1974.1050511. S2CID 283984.
    Dennard, R.H.; Gaensslen, F.H.; Hwa-Nien Yu; Rideout, V.L.; Bassous, E.; Leblanc, A.R. (April 1999). "Classic Paper: Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions". Proceedings of the IEEE. 87 (4): 668–678. CiteSeerX 10.1.1.334.2417. doi:10.1109/JPROC.1999.752522. S2CID 62193402.
  4. Borkar, Shekhar; Chien, Andrew A. (May 2011). "The Future of Microprocessors". Communications of the ACM. 54 (5): 67. doi:10.1145/1941487.1941507.
  5. Greene, Katie (September 12, 2011). "A New and Improved Moore's Law: Under "Koomey's law," it's efficiency, not power, that doubles every year and a half". Technology Review. Retrieved January 23, 2014.
  6. Koomey PhD, Jonathan G (2016-11-29). "Our latest on energy efficiency of computing over time, now out in Electronic Design". koomey.com. Retrieved 2021-01-15.
  7. "CMOS Power Consumption and CPD Calculation" (PDF). Texas Instruments. June 1997. Retrieved March 9, 2016.
  8. Bohr, Mark (January 2007). "A 30 Year Retrospective on Dennard's MOSFET Scaling Paper" (PDF). Solid-State Circuits Society. Retrieved January 23, 2014.
  9. Esmaeilzadeh, Hadi; Blem, Emily; St. Amant, Renee; Sankaralingam, Karthikeyan; Burger, Doug (2011). "Dark silicon and the end of multicore scaling". 2011 38th Annual International Symposium on Computer Architecture (ISCA). IEEE. pp. 365–376. CiteSeerX 10.1.1.222.8988. doi:10.1145/2000064.2000108. ISBN 978-1-4503-0472-6. S2CID 207188742.
  10. Hruska, Joel (February 1, 2012). "The death of CPU scaling: From one core to many – and why we're still stuck". ExtremeTech. Retrieved January 23, 2014.
This article is issued from Wikipedia. The text is licensed under Creative Commons - Attribution - Sharealike. Additional terms may apply for the media files.